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  • Jasper DA RSS Feed

    by Published on 05-20-2014 04:55 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/11092-jdac1.jpg

    Wait, didn't Cadence just acquire Jasper. Why is there a Jasper at DAC post?

    So the big event is lunch on Tuesday, on Treasure Island. For out of towners that is the island in the middle of the bay bridge (actually just half of it). Food trucks, awesome views of the bay, and really cool street performers. There will be street magic, a live band, a juggler, and a very unique bubble blower that will blow bubbles with people inside them! Full details and registration here.

    Of course ...
    by Published on 04-21-2014 12:49 AM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/10794-jsec1.jpg

    At DVCon Lawrence Loh and Viktor Markus Purri gave a tutorial on Formally Verifying Security Aspects of SoC Designs. Lawrence is the direector of WW application engineering and Markus is an FAE who specializes in security verification.

    I'm not going to attempt to summarize an entire half-day tutorial in under 1000 words, but here is the big picture story.

    To motivate the importance of security, they started with ...
    by Published on 03-31-2014 06:00 AM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/10605-jsec1.jpg

    Jasper finally announced their sequential equivalence checking app this morning. I say finally because they haven't really tried to keep it a secret. They talked about it at the end of last year the Jasper User Group meeting and it has even had a page on their website. But formally the product was announced today.

    The new JasperGold SEC App enables designers to exhaustively verify the sequential ...
    by Published on 03-13-2014 05:05 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/10434-rathous.jpg

    The Jasper European User Group meeting (EJUG) is coming up in a couple of weeks. It will be held in the Munich Hilton (which I have stayed in many times, the S-bahn from the airport pretty much stops in the basement) on April 2nd.

    The schedule for the day is:
    9:00 AM - Registration and continental breakfast
    9:30 AM - Jasper Overview
    9:45 AM - Customer Success Stories
    10:00 AM - ARM Presentation
    10:45 AM - Break
    11:15 AM - Port-Based Generic Mechanism ...
    by Published on 02-02-2014 04:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/10014-x2014_logo_header.png

    As usual, since they are firmly in the verification space, Jasper will have a number of things going on at DVCon 2014 which is March 3-6th at the Doubletree in San Jose. In the exhibition hall they are at booth #402.

    Jasper will be happy to talk to you about anything, I'm sure, but the focus this year is on the JasperGold Security Path Verification (SPV) App. This uses formal techniques (no surprise there) to verify ...
    by Published on 01-15-2014 10:55 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/9804-cov4.jpg

    At the Jasper Users Group meeting in October Rajeev Ranjan presented on the JasperGold COV App which he described as the Swiss army knife for verification. It comes in many sizes and contains many useful tools.


    The primary goal of COV is to provide coverage metrics:
    • stimuli coverage: how restrictive is the design behavior under the formal set up?
    • property completeness
    ...
    by Published on 12-16-2013 03:18 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/9526-spv1.jpg

    Formal approaches and security are a perfect match since you really want to prove that there are no holes in your security, rather than just being fairly confident. At the recent Jasper User Group meeting, Victor Purri presented some case studies in security verification.

    The Jasper Security Path Verification (SPV) App is used to prove properties about the paths to secured data. For example,

    • Data in secure
    ...
    by Published on 11-10-2013 01:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/9165-juga1.jpg

    At the Jasper Users' Group, Alex Netterville of ARM presented about how ARM are using formal on an unannounced processor code-named Pelican. Don't read the presentation trying to find out information about Pelican itself, there isn't any. That wasn't the topic. Alex has been using formal approaches for 10 years and worked on the ARM Cortices R4, A9, A5, and M0+.


    The approach he discussed was using formal approaches for all interfaces, precisely ...
    by Published on 10-31-2013 10:35 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/9091-jug1.jpg

    2.5x ROI vs simulation. 25% of bugs found for only 10% of the overall verification cost. 36% of bugs in a current CPU project. These impressive results for formal analysis are what ARMís Laurent Arditi reported at JUG 2013 after painstaking recording of metrics over several production programs.


    As you can see from the above graph, adoption has gone in a two steps forward one step ...
    by Published on 10-23-2013 02:16 PM
    1. Categories:
    2. Semiconductor Design,
    3. Jasper DA
    content/attachments/8960-kk4.jpg

    At the Jasper Users' Group meeting, Kathryn presented the state of Jasper. The numbers are impressive. The company has grown at a CAGR of over 35% since 2007, which is 6 times faster than EDA as a whole. They have been profitable at 15-20% EBITDA for 14 consecutive quarters.

    Jasper is focused on engaging deeply with a small number of customers who are committed to proliferating formal approaches ...

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