Big SoC designs typically break existing EDA tools and old methodologies, which then give rise to new EDA tools and methodologies out of necessity. Such is the case with the daunting task of verification planning and management where terabytes of data have simply swamped older EDA tools, making them unpleasant and ineffective to use.
Last week I spoke by phone with John Brennan
to learn about their decision to develop a totally new EDA tool for SoC verification planning and management. This is a product area familiar to Cadence users with