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    by Published on 04-29-2012 07:00 PM
    content/attachments/3544-lde-opt-fig-1.jpg.html

    At 28nm and below, a number of electrical variation effects become significant which depend not only on individual devices, but the physical interaction between neighboring devices, wells, etc during the manufacturing process. Some of these effects have become collectively referred to as “Layout Dependent Effects” (LDE); including the well-proximity effect, shallow trench isolation stress and a few others. Similar concerns include poly density, whose magnitude and variation can also affect device performance.

    These effects are not easily predicted in circuit design, because they depend on detailed ...
    by Published on 09-19-2011 06:00 PM
    content/attachments/1884-layout-catch-22.jpg.html

    As analog and mixed-signal designers move to very advanced geometries, they must grapple with more and more complex considerations of the silicon. Not only do nanometer CMOS devices have limitations in terms of analog-relevant characteristics such gain and noise performance, but they also introduce new sources of variation which designers must ...
    by Published on 08-26-2011 03:24 PM
    content/attachments/1747-cir2.jpg.html

    Analog has always been difficult, a bit of a black art persuading a digital process to create well-behaved analog circuits, capacitors, resistors and all the rest. In the distant past, we would solve this by putting the analog on a separate chip, often in a non-leading-edge process. But modern SoCs integrate large amounts of digital logic along with RF, analog and mixed-signal ...
    by Published on 06-17-2011 02:55 PM  Number of Views: 1265 
    1. Categories:
    2. EDA,
    3. Cadence,
    4. Ciranova
    content/attachments/1324-dac-ciranova.jpg.html

    Intro
    Ciranova offers you an alternative for analog layout automation besides Cadence Virtuoso. Mark Nadim provided me an update at DAC last Wednesday.


    Notes
    New in 2011
    - New GUI with schematic, layout and constraints
    o Cross probing between all three windows
    - Schematic for constraint entry
    o Can start with a blank schematic, enter new design ...