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  • Berkeley Design RSS Feed

    by Published on 02-26-2012 02:00 PM
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    What can we do for Earth’s sustainability? Besides sorting our garbage and recycling our lawn clippings? Sustainability must be the paramount theme for the future of human society! Semiconductors for a better life! Well, according to my kids, if you take away their smart phones there is no life!
    ...
    by Published on 12-06-2011 04:17 PM
    1. Categories:
    2. EDA,
    3. Cadence,
    4. Berkeley
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    In my dad's generation they tweaked cars to become hotrods while in EDA today we have companies that tweak SPICE circuit simulators to become crowned speed champions. The perennial question though is, "How fast and accurate is my SPICE circuit simulator?"
    ...
    by Published on 10-31-2011 09:07 AM
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    Wow! We always hear semiconductor companies complain about the lack of innovation amongst the EDA leaders. Placing high on the Deloitte 500 list shows that innovation is alive and well in EDA and it IS possible to have a meaningful impact regardless of your overall size. It is worth noting that there are very few EDA companies that have ever won this award.

    The Deloitte’s ...
    by Published on 10-06-2011 02:31 PM
    1. Categories:
    2. EDA,
    3. Berkeley
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    I read about how Toumaz used the Analog Fast SPICE (AFS) tool from BDA and it sounded interesting so I setup a Skype call with Alan Wong in the UK last month to find out how they design their ultra low-power IC chips.


    Interview

    Q: Tell me about your IC design background.
    A: I've been at Toumaz almost 8 years now and before that at Sony Semi for 5.5 years. My IC design experience goes back to 1997, then starting in 2005 I've been in the IC design group for wireless.

    Q: Does Toumaz have a CAD group?
    A: Yes, we do have two CAD engineers.

    Q: What EDA tools are you using?
    A: For RTL simulation ...
    by Published on 10-03-2011 07:16 PM
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    I spent Thursday Sept. 22 at the first nanometer Circuit Verification Forum, held at TechMart in Santa Clara. Hosted by Berkeley Design Automation (BDA), the forum was attended by 100+ people, with circuit designers dominating. I spoke with many attendees. They were seeking solutions to the hugely challenging problems they are wrestling with today when verifying high-speed and high-performance analog and mixed-signal circuits on advanced nanometer process geometries.

    One critical need is for very accurate circuit simulation that can precisely model the underlying physical nanometer effects with very fast simulation run-times. BDA claimed that its Analog FastSPICE (AFS) delivers this today, with foundry sign-off accuracy and the industry’s only silicon-accurate device noise analysis. All of this, and the world’s fastest nanometer circuit verification. Can it be true?

    According to the presenters at the forum, the answer is a resounding and definite yes. Attendees saw 15 user-presented experiences, drawn from active customers, university researchers, and EDA partners, all describing in detail how Analog FastSPICE delivers performance from 5X to 30X faster than other “golden” circuit simulators. In many cases this saves weeks or even months of simulation time and makes efficient circuit verification that has never been possible - or even attempted - before. There were several cases where AFS was “only” 2x-3x faster than “golden” SPICE simulator, but all of these were small circuits (e.g., <1K transistors) with short runtimes (e.g., a few minutes).

    Presenters from industry and universities described how AFS is used to verify data converters (both over-sampled and Nyquist) and closed-loop PLLs to within 1 or 2dB of silicon characterization. A broad range of additional circuits was also presented, from VCOs to entire top-level SerDes circuits (including two PLLs, one for clock and data recovery and one for transmit clock generation). New verification methodologies were also described; for example, the use of variable domain translators to perform linear AC analysis in non-voltage domains, allowing DLL/PLL delay and phase transfer function to be ...
    by Published on 09-13-2011 07:22 AM
    1. Categories:
    2. EDA
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    In working with TSMC and GlobalFoundries on AMS design reference flows I have experienced first hand the increasing verification challenges of nanometer analog, RF, and mixed-signal circuits. Tools in this area have to be both silicon accurate and blindingly fast! Berkeley Design Automation is one of the key vendors in this market and this blog comes from discussions ...
    by Published on 08-29-2011 12:33 PM
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    Verifying circuits on advanced process nodes has always been difficult, and it's no easier with today’s nanometer CMOS processes. There's a great paradox in nanometer circuit design and verification. Designers achieve their greatest differentiation when they implement analog, mixed-signal, RF and custom digital circuitry on a single nanometer CMOS die, running at GHz frequencies. Yet it’s these very circuits that create huge design challenges, and introduce a whole ...

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