Test engineers are often the unsung heroes in the semiconductor world, because they have the tough job of deciding if each IC is good or bad, while taking the least amount of time on a tester and ensuring that the tests are actually finding and uncovering all manufacturing and process variation defects. Simple stuck-at fault models are no longer sufficient to catch all of the actual defects, so to achieve the highest quality and lowest Defective Parts Per Million (DPPM) new Transition Delay (TD) patterns are being used. Extending TD testing with Slack-Based Transition Delay (SBTD) testing is a new approach for even higher defect coverage. A recent webinar
presented by Synopsys
and Avago focused on this test topic.