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  • Fractal Technologies

    by Published on 04-03-2014 09:32 AM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/10294-crossfire.jpg

    Semiconductor IP continues to grow in use for SoC design, and many chips can now use hundreds of IP blocks from multiple vendors. Validating the quality of the IP blocks is an important step in the design process, and you could perform manual validation and inspection of each new IP block at the expense of time and engineering effort. Another approach is to automate the process of IP validation, and you could start to write your own scripts and create your ...
    by Published on 10-29-2013 09:23 AM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/8923-ecsm-timing-model.jpg

    Semiconductor IP re-use enables modern SoC designs to be realized in a timely fashion, yet with hundreds of IP blocks in a chip the chances are higher that an error in any IP block could cause the entire system to fail. At advanced nodes like 28nm and smaller, the number of Process, Voltage and Temperature (PVT) corners is increasing to account for the variability.

    Qualification of each cell or IP block is then critical to ensure a correct by construction methodology. There are ...
    by Published on 10-17-2013 10:05 AM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/8632-crossfire.jpg

    Imagine that you're working in a CAD group and just received a new library of a few hundred IP blocks and you needed to know if these blocks conform to your design and quality standards. There are many questions about library and IP quality:


    • Are all of the views consistent (layout, schematic, HDL, test, timing, SPICE)?
    • Are there any anomalies in any view?
    • How much time can I spend doing QA on this library?

    ...
    by Published on 06-27-2013 01:34 PM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7762-img_3477.jpg

    Last year I was surprised at DAC by an un-heard of EDA company from China, ICScape. This year I followed up and spoke with Ravi Ravikumar about what's new with ICScape in 2013.



    ...
    by Published on 06-27-2013 01:13 PM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7760-img_3475.jpg

    The building blocks for every SoC are standard cell libraries that are assembled, designed and verified together. But how do we really know if all the data formats used during design are correct and consistent? To answer that question I spoke with Johan Peeters of Fractal Technologies at DAC.



    Johan Peeters, Rene Donkers
    ...
    by Published on 06-01-2013 04:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7478-renee-donkers.jpg

    Fractal Technologies is a privately held EDA company with offices in San Carlos, California and Eindhoven, the Netherlands. The company was founded by a small group of highly recognized EDA professionals. The scope of Fractal Technologies is to check consistency and validate all different data formats used in your design and subsequently improve the Quality of your Standard Cell Libraries, IO and IP. Fractal Technologies offers Crossfire software as well as services and customization.

    Rene Donkers and Johan Peeters are the gentlemen behind ...
    by Published on 05-23-2013 07:00 PM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7333-file1-layout.jpg

    Honestly speaking, there is no firm answer to this question, and often when we get confronted by our customers, we talk about the coverage reports. The truth is a product with high rate of coverage can very easily fail in customer environment. Of course coverage is important, and to be clear about the fact that the failure is not because a particular construct was not tested, we heavily stress on 100% coverage. When I was managing physical design EDA products, I often used to have ...
    by Published on 05-10-2013 09:42 AM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7182-fractal-technologies.jpg

    The tremendous growth in IC and SoC design complexity has now enabled engineers to place bilions of transistors on a single chip. To make that growth possible design teams resort to using libraries and semi IP provided by other groups in their company, or outside IP vendors. To lower risk, you must know that the IP being used in your next SoC is correct and that no errors are present.

    You could create ...
    by Published on 04-30-2013 06:05 PM
    1. Categories:
    2. Semiconductor Design,
    3. Fractal Technologies
    content/attachments/7003-file1-lib_form.jpg

    Very often we talk about increasing design complexities and verification challenges of SoCs. With ever growing design sizes and multiple IPs on a single SoC, it’s a fact that SoC design has become heterogeneous, being developed by multiple teams, either in-house or outsourced. Considering economic advantage amid pressure on profit margin, it makes sense for any fabless design company or an ...