Another problem that automation helps to address is that the first plan is never the last. As von Clausewitz said: "No campaign plan survives first contact with the enemy". In just the same way, no bus plan survives once the detailed placement of the rest of the chip gets done. Repeater cells, since they involve transistors, don't fly over the active areas but have to interact with them, so as the detailed layout of the chip converges the bus plan has to be constantly amended.
During bus planning itself, designers fit as many buses as possible through dedicated channels to avoidtiming issues. Very fast signals require shielding with DC signals such (such as ground) to prevent crosstalk noise issues. Often architects interleave buses so that they provide shielding for each other rather than using valuable resources for dedicated shielding. But planning, interleaving and routing hundreds of very wide buses is slow and error-prone. Internal tools created to do this are often unmaintainable and inadequate for the new generation of still larger chips.
Signals on wide buses need to arrive simultaneously with similar slopes so that they can be correctly latched. This means that the paths must match in terms of metal layers, vias, repeater and so on, a very time consuming process, especially when changes inevitably need to be made as the rest of the design is completed.
The Unity Bus Planner product page is here.