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  • An Affordable 3D Field Solver at DAC

    Intro
    Massimo Sivilotti, Ph.D of Tanner EDA showed me their 3D field solver in the HiPer PX extraction tool at DAC last week.

    Notes

    Tool Suites – schematics, layout, SPICE simulation, DRC/LVS
    - HiPer PX: 3D Field solver
    o Layers, dielectrics,
    o Finite element analysis
    o Boundary element methods
    o 2D mode for pattern matching
    o PDK – includes the info for PX extraction
    o 3D viewer to see the IC Layout
    o Offered for a few years now
    o Extract: Devices, parasitic, interconnect
    o Produces RC netlist (not L, not s-parameters), coupled C
    o Take parasitic from PX extraction then view it in Schematic editor (S-Edit)
     Swap out cell parasitics by changing the view
    o Run times are more limited by your simulator, not the extraction
    o Built-in netlist reduction algorithms (supply a frequency range), typically the reduced netlist is 10% the size of the original netlist
    o Not a multi-core algorithm yet (T-Spice is multi-core for circuit simulation)
    o Developed at TU Delft in Europe, licensed technology
    o Runs on both PC and Linux (32 or 64bit)
    o Comparable accuracy with Assura RX
    Licensing – Sentinel
    - Dongles
    - Commuter
    - Time-based
    - Rentals
    - Even permanent licenses

    L-Edit – used for stacked die layout with IC and Mems
    - Packaging techniques to locate all pads


    3D Solid Modeler
    - Used for MEMS Design – have a solid modeler (air or dielectrics)
    - Interfaces to Finite Element Analysis
    - Optical example with mirror

    Summary
    Tanner EDA continues to offer affordable IC design tools, HiPer PX offers both 3D and 2.5D extraction depending on the accuracy that you need.

    This article was originally published in forum thread: Best #48DAC Trip Report Gets an iPAD2 started by admin View original post