SemiWiki - ASIC Prototyping with M gates at $20K

I've used Aldec tools like their Verilog simulator (Riviera PRO) when teaching a class to engineers at Lattice Semi, so to get an update about the company I spoke with Dave Rinehart recently by phone. A big product announcement by Aldec today is for their ASIC prototyping system with a capacity range of 4 Million to 96 Million gates, called the HES-7.

Aldec Overview
Dr. Stanley Hyduke founded Aldec back in 1984 and they are still privately held and funded (no VCs), with some 185 people, and 34,000 licenses sold so far. The R&D for their tools and hardware is in Europe. Aldec customers are in five categories:

Military/Defense (VHDL simulator history)
Aerospace
Telecommunications
Avionics/Nuclear/Auto/Rail
Industrial

Headquarters are in Nevada (Sales, Marketing, Support), definitely outside the Silicon Valley stereo-type for EDA companies. Sales are in many countries: UK, Israel, India, China, Japan, Taiwan and Australia.

Three product categories are offered: Design Simulation, Functional Verification and Platform Validation (ASIC Prototyping):

ASIC Prototyping
You have several choices when considering ASIC prototyping:

Create your own boards (takes time, talent, tools)
Buy from vendors: Dini, Synopsys, Avnet, etc.

HES-7
Aldec has designed a family of ASIC prototyping boards based on the largest Xilinx FPGAs, the Virtex-7 devices. You can start out with a prototyping system with one Virtex-7 chip at 4 million gate capacity, or use multiple boards and Virtex-7 FPGAs to max out at 96 millions gates:

The good news for budget-conscious ASIC designers is that you can start out with ASIC prototyping for just $19K to get a 4 million gate capacity, then grow into a 24 million gate capacity for about $70K. At these prices you can let SW engineers develop and run SW in realtime at MHz speed on ASIC prototype boards to validate their code.

Each HES-7 board has at most two FPGAs on it, so you still have to do manual partitioning of your ASIC design. Expect your board to run at speeds up to 50MHz or so.

Design and then connect your own daughter-board for adding something like a processor, HDMI, etc. You're not locked into some proprietary connector, and I'd expect an eco-system to spring up around building and offering daughter-boards for the HES-7 product.

Software for Aldec's ASIC Prototyping is called the HES DVM.

To start out with you can order the 4 million and 8 million gate systems now, while the 12 million to 96 million gate systems await product parts from Xilinix.

Learning to use this ASIC prototyping tool follows a very similar flow approach to FPGA tools: Synthesize, P&R, program bit file, then run C++ code on HES board. Webinars will also be soon available so that you can learn more details and ask questions.

Aldec has been designing and building hardware-based accelerators for several years now with the previous HES-2 through HES-5 series products.