NotesDSM tools - Schematics (Pyxis), HDL simulation (ModelSim), Layout (Pyxis), verification (Calibre)
- Schematic Driven Layout
- Questa ADMS (AMS for full chip. SPICE, VHDL-AMS, VHDL, Verilog, Verilog-AMS, SystemVerilog, E. ADiT VPI will co-simulate with VCS or NC-Sim, used by Mediatek in Taiwan.)
- Eldo Classic (SPICE for small cell IP characterization, up to 1M devices)
- Eldo Premier (Faster SPICE up to 10M devices, most common features of ELDO but not all features. 64 bit, multi-threaded, multi-processor. About 2.5X to 20X faster than Eldo Classic. Integrated within Questa ADMS also.)
- ADiT (Fastest SPICE up to 50M devices. 10X to 100X faster than Eldo, within 3% accuracy of Eldo. It is multi-threaded, on a 4 core you see about 2X speed up.)
Design challenges: variability, statistical simulation, Monte Carlo simulation.
Features: Incremental Monte-Carlo simulation to save the state and add more Monte-Carlo results.
Monte-Carlo convergence monitoring - Eldo adds MC samples until the prescribed accuracy levels are reached.
Monte-Carlo LHS (Latin Hypercube Sample. Fewer runs, better results.)
Monte-Carlo QMC - Quasi Monte Carlo
Which parameters in my 28nm process impact the variability?
Eldo can run sensitivity analysis on your specific circuit and process file, then determine the most important parameters to vary. Works in both Eldo and Eldo Premier, but not ADiT.
Safe Operating Area (SOA) - type of reliability analysis with a filter to find the MOS devices operating in unsafe regions.
NBTI and HCI - aging effects of reliability analysis, which use reliability models from the foundry or your measurements.
About on par in performance with Spectre APS and FineSim SPICE, FineSim Pro.
Hierarchy improvements on the way for ADiT.