Of course there are enhancements to speed and capacity to keep up with the increase in design sizes. Some users have been running 280 million gate designs through flat overnight. There is some bottom-up hierarchical design support (and more coming in the future).
But the biggest changes are in the power area. There are some detailed improvements in UPF support, and how clock-domain-crossing analysis interacts with it.
Another new capability is that SpyGlass can now estimate design complexity using cyclomatic metrics, which is a measure based on branching analysis (usually in software but adapted to RTL). This is a good predictor for the time and effort that will be required to create a verification test bench for complete functional verification.
There are also improvements to SpyGlass Physical, in particular there is improved estimation of routing congestion and an early estimation of area, both of which give early and so actionable feedback about likely problems that will occur later with physical design.